The present invention relates to a semiconductor device and, more particularly, to a method of forming semiconductor junctions, which can prohibit an increase in the resistance of the junctions.
A semiconductor device includes a plurality of transistors. The transistors are electrically connected through metal lines. Each transistor generally comprises of a gate electrode and two source/drain junctions.
The junctions can be formed by performing an ion implantation process. The ion implantation process can be performed using different types of impurities according to the type of transistor to be formed. The characteristics of a junction can vary depending on the conditions of the ion implantation process. In particular, after the ion implantation process is performed, the implanted impurities are activated. The activation process is generally performed using a thermal treatment process.
As the level of integration of semiconductor devices continues to grow, the depth of a junction needs to become shallow. This type of junction is called an ultra-shallow junction. The ultra-shallow junction is formed by using a very low energy. If a very low energy is applied as described above, impurities generally exist near the surface of a semiconductor substrate. After an impurity activation process is carried out, a pre-metal dielectric layer is formed to cover both the gate and the junctions. After the pre-metal dielectric layer is formed, subsequent thermal treatment processes are performed several times. Here, the impurities formed near the surface of the semiconductor substrate can diffuse into the pre-metal dielectric layer and then be drained (i.e., removed) out of the junctions. As described above, if the impurities are drained from the junction, sheet resistance of the junction can increase.